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Introduction
1.1
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1.2
Features
The MC13852 is intended for applications from 400 to 1000 MHz; the MC13851 is for
applications >1000 MHz.
Gain: 20.3 dB (typ) at 434 MHz, 18.7 dB (typ) at 900 MHz.
Output third order intercept point (OIP3): 10.6 dBm at 434 MHz, 14.2 dBm (typ) dBm at 900 MHz.
Noise Figure (NF): 1.65 dB (typ) at 434 MHz, 1.2 dB at 900 MHz.
Output 1 dB compression point (P1dB): 7.8 dBm (typ) at 434 MHz, 9.6 dBm (typ) at 900 MHz.
IP3 Boost Circuitry.
Bypass mode return losses are comparable to active mode, for use in systems with filters and
duplexers.
Bypass mode improves dynamic range in variable signal strength environments.
Integrated logic-controlled standby mode with current drain < 1uA.
Total supply current variable from 3–6 mA using an external bias resistor.
Average current drain <0.6mA in a receiver lineup with 20% active / 80% bypass mode operation.
On-chip bias sets the bias point.
Bias stabilized for device and temperature variations.
MLPD-8 leadless package with low parasitics.
434 MHz and 900 MHz application circuit evaluation boards with characterization data are
available.
Available in tape and reel packaging.
Applications
Ideal for use in any RF product that operates between 400 MHz and 1 GHz, and may be applied in:
? Buffer amplifiers
? Mixers
? IF amplifiers
? Voltage-controlled oscillators (VCOs)
? Use with transceivers requiring external LNAs
? RF smart metering
? Mobile: Cellular front-end LNA, 2-way radios
? Auto: RKE, key fob, TPMS
? Low current drain/long standby time for extended battery life applications
Figure 1 shows a simplified block diagram, with the pinouts and the location of the pin 1 marking on the
package.
MC13852 Advance Information, Rev. 2.0
2
Freescale Semiconductor
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